Patent Number: 7,132,871

Title: Data retaining circuit

Abstract: A data retaining circuit has been disclosed in which, even if a soft error occurs, it is corrected and a normal value can be maintained, the configuration is simple, and high-speed operations are enabled. In this circuit, when a soft error occurs in the data to be put out, it is corrected by a pull-up path or a pull-down path, and when a soft error occurs in the data in the pull-up path or the pull-down path, the error data in the pull-up path or the pull-down path is prevented from affecting each other, as well as turning off the correcting function to prevent the influence on the data to be put out.

Inventors: Arima; Yukio (Yokohama, JP), Yamashita; Takahiro (Tokyo, JP), Ishibashi; Koichiro (Warabi, JP)

Assignee: Matsushita Electric Industrial Co., Ltd.

International Classification: H03K 3/356 (20060101); H03K 3/286 (20060101)

Expiration Date: 2019-11-07 0:00:00