Patent Number: 7,134,199

Title: Fluxless bumping process

Abstract: A process including providing a semiconductor device including a bond pad, and an under bump metallurgy overlying the bond pad. Forming a solder structure over the under bump metallurgy, and wherein the solder structure includes an outer layer including tin oxide. Producing a plasma from at least one of CF.sub.4 and SF.sub.6, and exposing the solder structure to the plasma. Heating the solder structure and cooling the same to provide a solder bump on the semiconductor device.

Inventors: Su; Chao-Yuan (Koahsiung, TW), Lin; Chia-Fu (Hsin-Chu, TW), Lee; Hsin-Hui (Kaohsiung, TW), Chen; Yen-Ming (Hsin-Chu, TW), Ching; Kai-Ming (Taiping, TW), Chen; Li-Chih (Taipei, TW), Kuo; Wen-Chang (Hsin-Chu, TW), Jian; Yue-Ying (Nantoa, TW)

Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.

International Classification: H01R 9/00 (20060101); H05K 3/00 (20060101)

Expiration Date: 2019-11-14 0:00:00