Patent Number: 7,233,046

Title: Semiconductor device and fabrication method thereof

Abstract: A semiconductor device and fabrication method thereof restrains an amplified current between input voltage Vin and ground voltage Vss, and first and second n-wells are biased into internal voltage sources, whereby the current-voltage characteristic of the input pad becomes stabilized during an open/short checkup of a semiconductor device. The semiconductor device includes a semiconductor substrate having a plurality of device isolation regions, first and second n-wells horizontally spaced from either of the plurality of device isolation regions, a p-channel transistor formed in the second n-well, an input protection transistor horizontally spaced from the first n-well and the device isolation region, on a symmetrical portion by the first n-well to the second n-well, and a guard ring formed between the first n-well and the input protection transistor.

Inventors: Lee; Chang Soo (Daeku, KR)

Assignee: Hyundai Electronics Industries Co., Ltd.

International Classification: H01L 29/76 (20060101); H01L 29/94 (20060101); H01L 31/00 (20060101)

Expiration Date: 2019-06-19 0:00:00