Patent Number: 7,272,671

Title: Means of control bits protection in a logical partition environment having a first and second distinct operating system

Abstract: A method, system, and apparatus for secure programmable addressing is provided by relocating functions within a multifunctional chip to be distributed across multiple logical partitions and maintaining security over the distribution mechanism. In one embodiment, this invention is used by a data processing system including a system processor connected to a plurality of operating system instances that are allocated individual system functions. Using logical partitioning, each operating system instance's access is limited to its own partition. Address buses to system functions are manipulated to make the functions appear at appropriate memory locations expected by the operating system instances. Accordingly, an inverter can be inserted on the address bus to change the address to a given distance in memory safe from operating system accessibility, for example, a page boundary. The functions' control areas are moved to a secure area of memory while the functions are remapped to the normal address ranges expected by the operating system instance in the respective logical partition.

Inventors: Arndt; Richard Louis (Austin, TX), Shempert; Craig Henry (Austin, TX)

Assignee: International Business Machines Corporation

International Classification: G06F 3/00 (20060101)

Expiration Date: 2019-09-18 0:00:00