Patent Number: 7,272,700

Title: Methods and apparatus for indirect compound VLIW execution using operand address mapping techniques

Abstract: An VLIW instruction mechanism is described which accesses multiple slot instructions for execution to achieve high levels of selectable parallelism and to make improvements to code density. To this end, the VLIW instruction mechanism includes a short instruction word (SIW) register for holding an SIW. The SIW includes an indication of a slot instruction to execute and a dynamic slot instruction operand which is used by the slot instruction to execute. Further, the VLIW instruction mechanism includes a register for holding slot instructions which are retrieved from VLIW memory. The retrieved slot instructions include a stored operand which is used when executing the retrieved slot instruction. The VLIW instruction mechanism further includes a controller and an execution unit. The controller selects which of the operands are utilized with the retrieved slot instructions. The execution unit executes the retrieved slot instruction with the selected operand.

Inventors: Pechanek; Gerald George (Cary, NC), Barry; Edwin Franklin (Vilas, NC)

Assignee: Altera Corporation

International Classification: G06F 9/30 (20060101); G06F 15/00 (20060101); G06F 9/40 (20060101)

Expiration Date: 2019-09-18 0:00:00