Patent Number: 7,421,779

Title: Multilayer board manufacturing method

Abstract: A base material (20) is arranged on top of at least one first internal layer base material (10), and a second internal base material (30) is arranged underneath the base material (10). And thereafter a surface layer circuitry conductive foil (40) is arranged underneath the base material (30), and subsequently these materials are colaminated for forming a colaminated body (80). While this colaminating operation, conductive portions being formed in the base materials 10, 30 are aligned to electrically connect one another for forming an internal circuitry. And thereafter, an interlayer conductive portion (51) being electrically connected to the internal circuitry is formed, and a minute circuitry is formed on the top of the base material (20) and the conductive foil (40) accordingly.

Inventors: Nakao; Osamu (Sakura, JP), Higuchi; Reiji (Sakura, JP), Ito; Syouji (Sakura, JP), Okamoto; Masahiro (Sakura, JP)

Assignee: Fujikura Ltd.

International Classification: H05K 3/30 (20060101)

Expiration Date: 2020-09-09 0:00:00