Patent Number: 7,465,596

Title: Manufacturing method of semiconductor device

Abstract: To provide a semiconductor device including a thinned substrate with high yield. After forming a protective layer in a predetermined portion (at least a portion covering a side surface of a substrate) of the substrate, grinding and polishing of the substrate are performed. In other words, an element layer including a plurality of integrated circuits is formed over one surface of the substrate, the protective layer is formed in contact with at least the side surface of the substrate, and the substrate is thinned (for example, the other surface of the substrate is ground and polished), the protective layer is removed, and the polished substrate and the element layer is divided so as to form stack bodies including a layer provided with at least one of the plurality of integrated circuits.

Inventors: Tsurume; Takuya (Atsugi, JP), Kusumoto; Naoto (Isehara, JP)

Assignee: Semiconductor Energy Laboratory Co., Ltd.

International Classification: H01L 21/00 (20060101)

Expiration Date: 2021-12-16 0:00:00