Patent Number: 7,465,976

Title: Tunneling field effect transistor using angled implants for forming asymmetric source/drain regions

Abstract: The present invention relates to a Tunnel Field Effect Transistor (TFET). which utilizes angle implantation and amorphization to form asymmetric source and drain regions. The IFET further includes a silicon germanium alloy epitaxial source region with a conductivity opposite that of the drain.

Inventors: Kavalieros; Jack T. (Portland, OR), Metz; Matthew V. (Hillsboro, OR), Dewey; Gilbert (Hillsboro, OR), Jin; Ben (Lake Oswego, OR), Brask; Justin K. (Portland, OR), Datta; Suman (Beaverton, OR), Chau; Robert S. (Beaverton, OR)

Assignee: Intel Corporation

International Classification: H01L 29/76 (20060101)

Expiration Date: 2021-12-16 0:00:00