Patent Number: 7,611,950

Title: Method for forming shallow trench isolation in semiconductor device

Abstract: A method for forming shallow trench isolation in a semiconductor device. The method includes forming a pad oxide and a pad nitride on a semiconductor substrate in successive order, forming a trench in the substrate by etching the pad nitride, the pad oxide and the substrate, removing a portion of the pad oxide to expose top corners of the trench, and rounding the exposed portion of the top corners of the trench by a wet chemical etch.

Inventors: Kim; Jung Ho (Seoul, KR)

Assignee: Dongbu Electronics Co., Ltd.

International Classification: H01L 21/336 (20060101)

Expiration Date: 1/03/02017