Patent Number: 7,612,625

Title: Bang-bang architecture

Abstract: In one embodiment, the present invention includes an apparatus having a voltage controlled oscillator (VCO) to generate a first clock signal having a frequency controlled by a bias current coupling ratio of first and second bias currents, and a control circuit coupled to the VCO to generate a first pair of control signals to adjust the bias current coupling ratio. Other embodiments are described and claimed.

Inventors: Gao; Miaobin (Saratoga, CA), Hsueh; Yu-Li (Mountain View, CA), Liu; Chien-Chang (Sunnyvale, CA)

Assignee: Intel Corporation

International Classification: H03B 5/12 (20060101); H03B 27/00 (20060101); H03L 7/099 (20060101)

Expiration Date: 1/03/02017