Patent Number: 7,613,164

Title: Method and apparatus for generating and distributing an internal clock for radio network controller

Abstract: A method for generating an internal clock in a radio network controller and a relevant transmission processing board. The transmission processing board comprises; a clock signal selector for extracting a clock signal from a synchronous/asynchronous line connected with a core network when said transmission processing board functions as a master transmission processing board, or for obtaining a clock signal from a clock bus of a sub-rack in which said transmission processing board is located when said transmission processing board functions as a slave transmission processing board; a phase-locked loop for generating a reference transmission clock based on the clock signal extracted or obtained by said clock signal selector; and a clock driver for transmitting the generated reference transmission clock to the clock bus of the sub-rackin which said transmission processing board is located when said transmission processing board functions as a master transmission processing board.

Inventors: Chunxu; Li (Shanghai, CN), Andrieu; Vianney (Velizy, FR), Weiwei; Liu (Shanghai, CN), Freynet; Marc (Shanghai, CN), Qing; Li (Shanghai, CN), Delbreil; Pierre (Velizy, FR), Neustadt; Alf (Stuttgart, DE)

Assignee: Alcatel

International Classification: H04J 3/06 (20060101); G06F 1/00 (20060101); H04L 12/66 (20060101); H04L 5/00 (20060101); H04L 7/00 (20060101); H04W 68/00 (20090101)

Expiration Date: 1/03/02017