Patent Number: 7,704,836

Title: Method of fabricating super trench MOSFET including buried source electrode

Abstract: In a trench MOSFET, the lower portion of the trench contains a buried source electrode, which is insulated from the epitaxial layer and semiconductor substrate but in electrical contact with the source region. When the MOSFET is in an "off" condition, the bias of the buried source electrode causes the "drift" region of the mesa to become depleted, enhancing the ability of the MOSFET to block current. The doping concentration of the drift region can therefore be increased, reducing the on-resistance of the MOSFET. The buried source electrode also reduces the gate-to-drain capacitance of the MOSFET, improving the ability of the MOSFET to operate at high frequencies. The substrate may advantageously include a plurality of annular trenches separated by annular mesas and a gate metal layer that extends outward from a central region in a plurality of gate metal legs separated by source metal regions.

Inventors: Pattanayak; Deva N. (Saratoga, CA), Bai; Yuming (Union City, CA), Terrill; Kyle (Santa Clara, CA), Yue; Christiana (Milpitas, CA), Xu; Robert (Fremont, CA), Lui; Kam Hong (Santa Clara, CA), Chen; Kuo-In (Los Altos, CA), Shi; Sharon (San Jose, CA)

Assignee: Siliconix incorporated

International Classification: H01L 21/336 (20060101)

Expiration Date: 4/27/12018