Patent Number: 7,709,311

Title: JFET device with improved off-state leakage current and method of fabrication

Abstract: A junction field effect transistor comprises a semiconductor substrate. A first impurity region of a first conductivity type is formed in the substrate. A second impurity region of the first conductivity type is formed in the substrate and spaced apart from the first impurity region. A channel region of the first conductivity type is formed between the first and second impurity regions. A gate region of a second conductivity type is formed in the substrate between the first and second impurity regions. A gap region is formed in the substrate between the gate region and the first impurity region such that the first impurity region is spaced apart from the gate region.

Inventors: Saha; Samar K. (Milpitas, CA), Kapoor; Ashok K. (Palo Alto, CA)

Assignee: SuVolta, Inc.

International Classification: H01L 21/337 (20060101)

Expiration Date: 5/04/12018