Patent Number: 7,710,149

Title: Input buffer for multiple differential I/O standards

Abstract: An input buffer circuit has a plurality of selectively enabled differential amplifier circuits, where each differential amplifier is configured for compatibility with a particular differential I/O standard and its corresponding input operating range. For example, the input buffer may have two differential amplifiers suitable for receiving LVDS differential input signals over a wide input operating range, and another differential amplifier suitable for receiving the PCML differential input signals. One or more control signals are provided to the input buffer, e.g., programmably, to selectively enable the required differential amplifier(s) for a given I/O standard.

Inventors: Chung; Jonathan (Newark, CA), Kim; In Whan (San Jose, CA), Pan; Philip (Fremont, CA), Sung; Chiakang (Milpitas, CA), Wang; Bonnie (Cupertino, CA), Wang; Xiabao (Santa Clara, CA), Chong; Yan (Stanford, CA), Rangan; Gopinath (Santa Clara, CA), Nguyen; Khai (San Jose, CA), Chang; Tzung-Chin (San Jose, CA), Huang; Joseph (San Jose, CA)

Assignee: Altera Corporation

International Classification: H03K 19/094 (20060101); H03K 19/0948 (20060101)

Expiration Date: 5/04/12018