Patent Number: 7,710,180

Title: Signal offset cancellation

Abstract: Techniques and circuitry are provided for programmably controlling signal offsets in integrated circuitry. In one embodiment, an integrated circuit includes a signal offset cancellation circuit that is programmably selected to control the offset of signals on either one input/output or another input/output of an amplifier circuit. In one embodiment, a logic circuit is used to selectively couple a bank of current sources to one input/output or another input/output of a differential amplifier through a switching circuit. The bank of current sources may employed to control the signal offset on either input/output, or may be decoupled from all of the inputs/outputs when signal offset cancellation is not required.

Inventors: Lai; Tin H. (San Jose, CA), Wong; Wilson (San Francisco, CA)

Assignee: Altera Corporation

International Classification: H03F 3/45 (20060101); H03L 5/00 (20060101)

Expiration Date: 5/04/12018