Patent Number: 7,710,788

Title: Flash memory device and method of testing a flash memory device

Abstract: A flash memory device includes a flash fuse cell array, a trim code processing unit, a flash memory array, and a regulator. The fuse cell array, which includes multiple nonvolatile fuse cells, is configured to store a first trim code. The trim code processor is configured to generate a second trim code based on the first trim code provided by the fuse cell array and a voltage control code. The flash memory array includes multiple flash memory cells. The regulator is configured to generate a high voltage in response to the second trim code and to provide the high voltage to the flash memory array. The high voltage varies according to erase, program and read operations of the flash memory cells.

Inventors: Jeon; Hong-Soo (Suwon-si, KR), Kim; Dae-Han (Gangdong-gu, KR)

Assignee: Samsung Electronics Co., Ltd.

International Classification: G11C 16/04 (20060101)

Expiration Date: 5/04/12018