Patent Number: 7,710,965

Title: Method and system for multi-program clock recovery and timestamp correction

Abstract: A decoder includes a transport engine configured to receive programs and extract timing information and timestamps embedded in the programs. An adder is configured to add a set of timing offsets to the sets of timing information to adjust the timing information from a first time basis to a second time basis. Sums of the timing offsets and the timing information are referred to the mapped-timing information. A correction engine is configured to update the timing offsets as timing information is encountered in the programs, and an offset register is configured to: receive the timing offsets, store the timing offsets, and transfer the timing offsets to the adder. The adder is also configured to add the timing offsets to the timestamps to adjust the time basis of the timestamps from the first time basis to the second time basis. A program is decoder configured to receive the adjusted timestamps to decode the programs.

Inventors: Liu; Binfan (Livermore, CA), Ayers; Thomas (San Jose, CA), Zhang; Weimin (San Jose, CA)

Assignee: Broadlogic Network Technologies Inc.

International Classification: H04J 3/06 (20060101)

Expiration Date: 5/04/12018