Patent Number: 7,714,669

Title: Phase alignment circuit for a TDC in a DPLL

Abstract: The present disclosure relates to circuits and methods for accelerating a new frequency lock-in process of a digital phase-locked loop.

Inventors: Gotz; Edmund (Dachau, DE), Meiser; Klaus Peter (Holzkirchen, DE)

Assignee: Infineon Technologies AG

International Classification: H03L 7/191 (20060101)

Expiration Date: 5/11/12018