Patent Number:
7,716,625
Title:
Logic circuit and method of logic circuit design
Abstract:
A complementary logic circuit contains a first logic input, a second logic input, a first dedicated logic terminal, a second dedicated logic terminal, a first logic block, and a second logic block. The first logic block consists of a network of p-type transistors for implementing a predetermined logic function. The p-type transistor network has an outer diffusion connection, a first network gate connection, and an inner diffusion connection. The outer diffusion connection of the p-type transistor network is connected to the first dedicated logic terminal, and the first network gate connection of the p-type transistor network is connected to the first logic input. The second logic block consists of a network of n-type transistors which implements a logic function complementary to the logic function implemented by the first logic block. The n-type transistor network has an outer diffusion connection, a first network gate connection, and an inner diffusion connection. The outer diffusion connection of the n-type transistor network is connected to the second dedicated logic terminal, and the first network gate connection of the n-type transistor network is connected to the second logic input. The inner diffusion connections of the p-type network and of the n-type network are connected together to form a common diffusion logic terminal.
Inventors:
Morgenshtein; Arkadiy (Kiryat-Motzkin, IL), Fish; Alexander (Hadera, IL), Wagner; Israel A. (Zikhron-Yaakov, IL)
Assignee:
Technion Research & Development Foundation Ltd.
International Classification:
G06F 17/50 (20060101)
Expiration Date:
5/11/12018