Patent Number: 7,765,077

Title: Method and apparatus for creating a Spacer-Optimization (S-O) library

Abstract: The invention can provide a method of processing a substrate using Spacer-Optimization (S-O) processing sequences and evaluation libraries that can include one or more optimized spacer creation and evaluation procedures. In addition, the S-O processing sequences can include one or more deposition procedures, one or more partial-etch procedures, one or more chemical oxide removal (COR)-etch procedures, one or more optimization procedures, one or more evaluation procedures, and/or one or more verification procedures.

Inventors: Yamashita; Asao (Fishkill, NY), Funk; Merritt (Austin, TX), Prager; Daniel J. (Hopewell Junction, NY), Chen; Lee (Cedar Creek, TX), Sundaranajan; Radha (Dripping Springs, TX)

Assignee: Tokyo Electron Limited

International Classification: G01D 18/00 (20060101)

Expiration Date: 7/27/12018