Patent Number: 7,765,250

Title: Data processor with internal memory structure for processing stream data

Abstract: There is provided at least one processor block including a plurality of load store interfaces (801, 804), a plurality of memory banks (821), an input/output port having at least one of an input port (850) and an output port (860), and a crossbar switch (810), and the crossbar switch connects the load store interface, the memory bank and the input/output port to each other and the load store interface constitutes a data processor in order to control a data transfer to the memory bank. Consequently, there is implemented a data processor having a high transfer throughput and a flexibility and efficiently treating stream data.

Inventors: Tsunoda; Takanobu (Kokubunji, JP), Atwood; Bryan (Tokyo, JP), Takada; Masashi (Kokubunji, JP), Tanaka; Hiroshi (Kokubunji, JP)

Assignee: Renesas Technology Corp.

International Classification: G06F 7/38 (20060101)

Expiration Date: 7/27/12018