Patent Number: 7,765,342

Title: Systems, methods, and computer program products for packing instructions into register files

Abstract: Embodiments of the present invention may provide for architectural and compiler approaches to optimizing processors by packing instructions into instruction register files. The approaches may include providing at least one instruction register file, identifying a plurality of frequently-used instructions, and storing at least a portion of the identified frequently-used instructions in the instruction register file. The approaches may further include specifying a first identifier for identifying each of instructions stored within the instruction register file, and retrieving at least one packed instruction from an instruction cache, wherein each packed instruction includes at least one first identifier. The packed instructions may be tightly packed or loosely packed in accordance with embodiments of the present invention. Packed instructions may also be executed alongside traditional non-packed instructions. Further, the use of packed instructions and instruction register files may provide a level of indirection that enhances the security of the embodying software.

Inventors: Whalley; David (Tallahassee, FL), Tyson; Gary (Tallahassee, FL)

Assignee: Florida State University Research Foundation

International Classification: G06F 3/00 (20060101); G06F 5/00 (20060101); G06F 15/00 (20060101); G06F 15/76 (20060101); G06F 7/38 (20060101); G06F 9/44 (20060101); G06F 9/00 (20060101)

Expiration Date: 7/27/12018