Patent Number: 7,765,534

Title: Compiler with cache utilization optimizations

Abstract: A compiling program with cache utilization optimizations employs an inter-procedural global analysis of the data access patterns of compile units to be processed. The global analysis determines sufficient information to allow intelligent application of optimization techniques to be employed to enhance the operation and utilization of the available cache systems on target hardware.

Inventors: Archambault; Roch G. (North York, CA), Blainey; Robert J. (Newmarket, CA), Gao; Yaoqing (North York, CA)

Assignee: International Business Machines Corporation

International Classification: G06F 9/45 (20060101)

Expiration Date: 7/27/12018