Patent Number: 7,785,938

Title: Semiconductor integrated circuit, manufacturing method thereof, and semiconductor device using semiconductor integrated circuit

Abstract: A step of forming a through hole in a semiconductor substrate, or a step of polishing the semiconductor substrate from its back surface requires a very long time and causes decrease of productivity. In addition, when semiconductor substrates are stacked, a semiconductor integrated circuit which is formed of the stack is thick and has poor mechanical flexibility. A release layer is formed over each of a plurality of substrates, layers each having a semiconductor element and an opening for forming a through wiring are formed over each of the release layers. Then, layers each having the semiconductor element are peeled off from the substrates, and then overlapped and stacked, a conductive layer is formed in the opening, and the through wiring is formed; thus, a semiconductor integrated circuit is formed.

Inventors: Yamaguchi; Mayumi (Atsugi, JP), Izumi; Konami (Atsugi, JP)

Assignee: Semiconductor Energy Laboratory Co., Ltd

International Classification: H01L 21/00 (20060101)

Expiration Date: 8/31/12018