Patent Number: 7,785,980

Title: Method of manufacturing semiconductor device using alignment mark and mark hole

Abstract: An object of the present inventions is to overcome a problem that the presence of a metal film, which is opaque to a visible light, between a lower layer alignment mark and a photoresist prevents the detection of the lower layer alignment mark, to make the pattern formation difficult. In the present inventions, an insulating film is placed beneath the alignment mark in structure; an alignment mark consisting of said multi-layered film comprising an alignment mark layer and the insulating film, which constitutes a stepped part with an increased difference in level, is first formed, inside a mark hole, in a manner of self-alignment; and then the metal film which is the very cause of the above problem is formed thereon. Since the metal film itself has a stepped shape corresponding to the alignment mark, alignment can be made with great accuracy.

Inventors: Suzuki; Kazushi (Tokyo, JP)

Assignee: Elpida Memory, Inc.

International Classification: H01L 21/30 (20060101)

Expiration Date: 8/31/12018