Patent Number: 7,786,510

Title: Transistor structure and manufacturing method thereof

Abstract: An HBT structure and manufacturing method thereof, in which the HBT structure includes an emitter, an intrinsic base, a collector, an insulating sidewall, and a stress-inducing base formed by selective epitaxial growth to locally induce a stress to the HBT structure. Compressive or tensile stress is additionally induced from outside to modify physical and electric properties of a semiconductor layer, thereby improving the performance of the transistor.

Inventors: Shim; Kyu-Hwan (Jeollabuk-do, KR), Choi; Sang-Sig (Jeollabuk-do, KR), Choi; A-Ram (Jeollabuk-do, KR)

Assignee: Chonbuk National University

International Classification: H01L 31/0328 (20060101)

Expiration Date: 8/31/12018