Patent Number: 7,786,526

Title: Nonvolatile semiconductor memory device

Abstract: It is an object of the present invention to provide a nonvolatile semiconductor memory device which has superior writing characteristics and electric charge retention characteristics. In addition, it is an object of the present invention to provide a nonvolatile semiconductor memory device in which a writing voltage can be reduced. The nonvolatile semiconductor memory device includes a semiconductor region with a channel formation region formed between a pair of impurity regions which are formed to be apart from each other; and a first insulating layer, a charge accumulation layer, a second insulating layer, and a control gate are formed in a location which is a top layer portion of the semiconductor region and which roughly overlaps with the channel formation region. The charge accumulation layer is insulative and is formed as a layer in which electric charge can be trapped.

Inventors: Takano; Tamae (Kanagawa, JP), Furuno; Makoto (Kanagawa, JP), Asami; Yoshinobu (Kanagawa, JP), Yamazaki; Shunpei (Tokyo, JP)

Assignee: Semiconductor Energy Laboratory Co., Ltd.

International Classification: H01L 29/792 (20060101)

Expiration Date: 8/31/12018