Patent Number: 7,786,607

Title: Overlay correction by reducing wafer slipping after alignment

Abstract: A method and apparatus for correcting overlay errors in a lithography system. During lithographic exposure, features being exposed on the wafer need to overlay existing features on the wafer. Overlay is a critical performance parameter of lithography tools. The wafer is locally heated during exposure. Thermal expansion causes stress between the wafer and the wafer table, which will cause the wafer to slip if it exceeds the local frictional force. To increase the amount of expansion allowed before slipping occurs, the wafer chuck is uniformly expanded after the wafer has been loaded. This creates an initial stress between the wafer and the wafer table. As the wafer expands due to heating during exposure, the expansion first acts to relieve the initial stress before causing an opposite stress from thermal expansion. The wafer may be also be heated prior to attachment to the wafer chuck, creating the initial stress as the wafer cools.

Inventors: Kochersperger; Peter (Easton, CT)

Assignee: ASML Holding N.V.

International Classification: H01L 23/544 (20060101)

Expiration Date: 8/31/12018