Patent Number: 7,786,723

Title: Test stage for a carrier having printhead integrated circuitry thereon

Abstract: This invention provides for a test stage for a printhead integrated circuit tester for testing operation of printhead integrated circuits mounted on a carrier. The test stage includes a support structure. A fixture is arranged on the support structure and is configured to receive and locate the carrier. A clamping mechanism is arranged on the fixture. The clamping mechanism has at least one clamp assembly for clamping the carrier to the test stage. A controller controls operation of the clamping mechanism.

Inventors: Burke; David Oliver (Balmain, AU), Sleijpen; Stephen John (Balmain, AU), Waszczuk; Jan (Balmain, AU), Tharion; Joseph (Balmain, AU)

Assignee: Silverbrook Research Pty Ltd

International Classification: G01R 31/28 (20060101); G01R 31/02 (20060101)

Expiration Date: 8/31/12018