Patent Number: 7,786,757

Title: Integrated circuits with hybrid planer hierarchical architecture and methods for interconnecting their resources

Abstract: Methods for interconnecting base, switching and interconnect resources for configurable integrated circuits are provided, where these methods include the following steps: interconnecting base and switching resources with interconnect resources to form a hierarchical interconnect structure; physically placing the hierarchical interconnect structure in a two dimensional format; and directly interconnecting selected neighboring base and switching resources. The integrated circuits generated include base resources, interconnect resources; and switching resources that are interconnected to form a hierarchical interconnect structure, and, additional interconnect resources that directly interconnect neighboring switching or base resources.

Inventors: Mayer; Ernst (Cupertino, CA), Nicholson, Jr.; Ronald H. (Santa Clara, CA), Winegarden; Steven (Sunnyvale, CA)

Assignee: Agate Logic, Inc.

International Classification: H03K 17/16 (20060101)

Expiration Date: 8/31/12018