Patent Number: 7,786,774

Title: Phase synchronization apparatus

Abstract: A phase synchronization apparatus includes an oscillator gain setting member configured to discriminate a frequency by sequentially delaying input clock signal after dividing the input clock signal at a predetermined division ratio and to generate an oscillator gain setting signal by using discriminated frequency information, and a phase locked loop (PLL) circuit configured to oscillates output clock signal having a frequency corresponding to the oscillator gain setting signal in response to the input clock signal.

Inventors: Yun; Won-Joo (Ichon, KR), Lee; Hyun-Woo (Ichon, KR)

Assignee: Hynix Semiconductor Inc.

International Classification: H03L 7/06 (20060101)

Expiration Date: 8/31/12018