Patent Number: 7,786,778

Title: Output voltage slew rate control in hard disk motor drive

Abstract: A driver circuit includes a first transistor having a first node coupled to a high supply voltage and a second node coupled to an output node, wherein the first transistor passes the high supply voltage to the output node based on a first gate voltage on a gate of the first transistor. The driver circuit also includes a second transistor having a first node coupled to a low supply voltage and a second node coupled to the output node of the driver circuit, wherein the second transistor passes the low voltage to the output node based on a second gate voltage on a gate of the second transistor. The driver circuit further includes a logic block configured to control a slew rate of an output signal Vout at the output node by controlling a slew rate of the first gate voltage and controlling a slew rate of the second gate voltage.

Inventors: Mannoorittathu; Vishnu (Singapore, SG), Li; Ying Tian (Sunglade, SG)

Assignee: Marvell International Ltd.

International Classification: H03K 5/12 (20060101)

Expiration Date: 8/31/12018