Patent Number: 7,786,792

Title: Circuits, architectures, apparatuses, systems, and methods for low noise reference voltage generators with offset compensation

Abstract: Circuits, architectures, systems, and methods for generating temperature-stable reference voltages with offset compensation. The circuits generally include a diode junction voltage generator, and three composite voltage generators configured to operate in first and second phases or modes of operation. The diode junction voltage generator produces first and diode junction voltages with different current densities (Vd1 and Vd2). The first composite voltage (VC1) comprises at least a fraction of the first and/or second diode junction voltage. The second composite voltage (VC2) is generated during the first phase and comprises a difference between Vd2 and a sum of VC1 and an offset voltage (Ve) of an amplifier and/or other summation circuit. The third composite voltage (VC3) is generated during the second phase such that VC3 is proportional to a difference between Vd1 and a sum of Ve and VC2. A temperature-stable reference voltage proportional to VC3 may be continuously generated. Embodiments advantageously produce reference voltages much smaller than the band-gap voltage, are substantially insensitive to any voltage offset in the associated summation circuit, and/or produce low noise without further filtering.

Inventors: Gay; Michael J. (Coppet Vaud, CH)

Assignee: Marvell International Ltd.

International Classification: G05F 1/10 (20060101)

Expiration Date: 8/31/12018