Patent Number: 7,788,444

Title: Multi-hit detection in associative memories

Abstract: Mechanisms for multiple hit (multi-hit) detection in associative memories, such as a content addressable memory (CAM), are provided. The illustrative embodiments include a hit bitline that discharges as RAM side entries of the associative memory are accessed. The hit bitline is precharged high and pulled low by a series of devices that are activated as each RAM side row is accessed. As more RAM side rows are accessed, the hit bitline drops lower in voltage. The hit bitline drives an inverter with a threshold set such that any voltage equal to or lower than the threshold indicates a multi-hit situation. Any voltage higher than the threshold indicates a single hit or "no-hit" situation. Thus, from the voltage of the hit bitline, the presence of a multi-hit condition may be detected.

Inventors: Lee; Michael J. (Austin, TX), Truong; Bao G. (Austin, TX)

Assignee: International Business Machines Corporation

International Classification: G06F 13/00 (20060101); G06F 13/28 (20060101); G11C 15/00 (20060101)

Expiration Date: 8/31/12018