Patent Number: 7,820,457

Title: Method of NBTI prediction

Abstract: A method includes measuring a gate leakage current of a plurality of transistors. A single stress bias voltage is applied to the plurality of transistors. The stress bias voltage causes a 10% degradation in a drive current of each transistor within a respective stress period t. One or more relationships are determined, between the measured gate leakage current and one or more of the group consisting of gate voltage, gate length, gate temperature, and gate width of the plurality of transistors, respectively. A negative bias temperature instability (NBTI) lifetime .tau. of the plurality of transistors is estimated, based on the measured gate leakage current and the one or more relationships.

Inventors: Chen; Chia-Lin (Jhubei, TW), Lin; Yi-Miaw (Banciao, TW), Chen; Ming-Chen (Hsin-chu, TW)

Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.

International Classification: G01R 31/26 (20060101)

Expiration Date: 2018-10-26 0:00:00