Patent Number: 7,821,110

Title: Circuit structures and methods with BEOL layer(s) configured to block electromagnetic interference

Abstract: Back end of line (BEOL) circuit structures and methods are provided for blocking externally-originating or internally-originating electromagnetic interference. One such BEOL circuit structure includes one or more semiconductor substrates supporting one or more integrated circuits, and one or more BEOL layers disposed over the semiconductor substrate(s). At least one BEOL layer includes a conductive pattern defined at least partially by a plurality of elements arrayed in a first direction and a second direction throughout at least a portion thereof. The plurality of elements are sized and positioned in at least one of the first and second directions to block electromagnetic interference of a particular wavelength from passing therethrough. In one implementation, a first conductive pattern of a first BEOL layer polarizes electromagnetic interference, and a second conductive pattern of a second BEOL layer blocks the polarized electromagnetic interference.

Inventors: Kim; Dae Ik (Fishkill, NY), Kim; Jonghae (Fishkill, NY), Kim; Moon Ju (Wappingers Falls, NY), Cho; Choongyeun (Hopewell Junction, NY)

Assignee: International Business Machines Corporation

International Classification: H01L 23/552 (20060101)

Expiration Date: 2018-10-26 0:00:00