Patent Number: 7,822,925

Title: Low power semi-trace instruction/trace hybrid cache with logic for indexing the trace cache under certain conditions

Abstract: A semi-trace cache combines elements and features of an instruction cache and a trace cache. An ICache portion of the semi-trace cache is filled with instructions fetched from the next level of the memory hierarchy while a TCache portion is filled with traces gleaned either from the actual stream of retired instructions or predicted before execution.

Inventors: Morrow; Michael W. (Chandler, AZ)

Assignee: Marvell International Ltd.

International Classification: G06F 12/00 (20060101); G06F 13/00 (20060101)

Expiration Date: 2018-10-26 0:00:00