Patent Number: 7,822,949

Title: Command supply device that supplies a command read out from a main memory to a central processing unit

Abstract: A command supply device supplies a command sequence that forms a loop. A loop command buffer accumulates a first partial command sequence. The first partial command sequence is a head part of a first command sequence repeatedly supplied to a CPU from among command sequences stored in a main memory, and is accumulated before the first command sequence is supplied to the CPU again. A linking command buffer accumulates a second partial command sequence. The second partial command sequence follows the first partial command sequence in the first command sequence, and is accumulated while the accumulated first partial command sequence in the loop command buffer is supplied to the CPU. A selection circuit supplies, to the CPU, a command from the accumulated second partial command sequence in the linking command buffer when the entirety of the first partial command sequence has been supplied to the CPU.

Inventors: Ogura; Satoshi (Kyoto, JP)

Assignee: Panasonic Corporation

International Classification: G06F 7/38 (20060101); G06F 9/00 (20060101); G06F 9/44 (20060101)

Expiration Date: 2018-10-26 0:00:00