Patent Number: 7,824,939

Title: Method for manufacturing display device comprising separated and electrically connected source wiring layers

Abstract: Etching is performed using mask layers formed by a multi-tone mask which is a light-exposure mask through which light is transmitted to have a plurality of intensity, in a method for manufacturing a display device including an inverted staggered thin film transistor with a channel-etched structure. Further, a gate wiring layer and a source wiring layer are formed over a substrate in the same step, and the source wiring layer is separated (disconnected) at an intersection of the gate wiring layer and the source wiring layer. The separated source wiring layers are connected to each other electrically through an opening (a contact hole) via a conductive layer formed over a gate insulating layer in the same step as formation of source and drain electrode layers.

Inventors: Hosoya; Kunio (Atsugi, JP), Fujikawa; Saishi (Atsugi, JP), Chiba; Yoko (Atsugi, JP)

Assignee: Semiconductor Energy Laboratory Co., Ltd.

International Classification: H01L 21/00 (20060101)

Expiration Date: 2019-11-02 0:00:00