Patent Number: 7,825,458

Title: Nonvolatile semiconductor memory and manufacturing method thereof

Abstract: A nonvolatile semiconductor memory includes a source area and a drain area provided on a semiconductor substrate with a gap which serves as a channel area, a first insulating layer, a charge accumulating layer, a second insulating layer (block layer) and a control electrode, formed successively on the channel area, and the second insulating layer is formed by adding an appropriate amount of high valence substance into base material composed of substance having a sufficiently higher dielectric constant than the first insulating layer so as to accumulate a large amount of negative charges in the block layer by localized state capable of trapping electrons, so that the high dielectric constant of the block layer and the high electronic barrier are achieved at the same time.

Inventors: Shimizu; Tatsuo (Tokyo, JP), Muraoka; Koichi (Sagamihara, JP), Koyama; Masato (Miura-gun, JP), Kikuchi; Shoko (Kawasaki, JP)

Assignee: Kabushiki Kaisha Toshiba

International Classification: H01L 29/792 (20060101)

Expiration Date: 2019-11-02 0:00:00