Patent Number: 7,825,468

Title: Semiconductor packages, stacked semiconductor packages, and methods of manufacturing the semiconductor packages and the stacked semiconductor packages

Abstract: A semiconductor package may include a semiconductor pattern, a bonding pad, and a polymer insulation member. The semiconductor pattern may include a semiconductor device and first hole. The bonding pad may include a wiring pattern and plug. The wiring pattern may be formed on an upper face of the semiconductor pattern. The plug may extend from the wiring pattern to fill the first hole. The polymer insulation member may be formed on a lower face of the semiconductor pattern and may include a second hole exposing a lower end of the plug. A method of manufacturing a semiconductor package may include forming a first hole through a semiconductor substrate; forming a bonding pad and plug; attaching a supporting member to the upper face of the substrate; reducing a thickness of the substrate; forming a polymer insulation member on the lower face of the substrate; and cutting the substrate.

Inventors: Kwon; Yong-Chai (Suwon-si, KR), Lee; Dong-Ho (Seongnam-si, KR)

Assignee: Samsung Electronics Co., Ltd.

International Classification: H01L 29/76 (20060101); H01L 23/04 (20060101); H01L 23/48 (20060101); H01L 31/113 (20060101); H01L 31/062 (20060101); H01L 29/94 (20060101)

Expiration Date: 2019-11-02 0:00:00