Patent Number: 7,825,527

Title: Return loss techniques in wirebond packages for high-speed data communications

Abstract: A wirebond package configured to reduce wirebond return loss is presented. An integrated circuit of interest with rows of bonding pads is bonded to a surface of the wirebond package. The surface of wirebond package has columns of bonding pads, which are configured to transmit or receive signals, power, and ground to and/or from the wirebond package to the integrated circuit. Corresponding die pads on the integrated circuit and bonding pads of the wirebond package are coupled using conductive lines. The conductive lines carrying the active signal has coplanar adjacent ground lines on opposing sides of active signal line and the distance between active signal line and the coplanar adjacent ground lines is tapered.

Inventors: Bereza; William W. (Nepean, CA), Shi; Hong (Santa Rosa, CA)

Assignee: Altera Corporation

International Classification: H01L 23/48 (20060101); H01L 29/40 (20060101); H01L 23/52 (20060101)

Expiration Date: 2019-11-02 0:00:00