Patent Number: 7,825,683

Title: On die termination device and semiconductor memory device including the same

Abstract: On die termination (ODT) device that can reduce the number of lines for transferring calibration codes to reduce the size of a chip including the ODT device. The ODT device includes a calibration circuit configured to generate calibration codes for determining a termination resistance, a counting circuit configured to generate counting codes increasing with time. A transferring circuit of the device is configured sequentially to transfer the calibration codes in response to the counting codes. A receiving circuit is configured sequentially to receive the calibration codes from the transferring circuit in response to the counting codes. A termination resistance circuit of the device is configured to perform impedance matching using a resistance determined according to the calibration codes.

Inventors: Kim; Ki-Ho (Kyoungki-do, KR), Jang; Ji-Eun (Kyoungki-do, KR)

Assignee: Hynix Semiconductor Inc.

International Classification: H03K 17/16 (20060101)

Expiration Date: 2019-11-02 0:00:00