Patent Number: 7,826,738

Title: Semiconductor integrated circuit device, data recording device, and layout method for semiconductor integrated circuit device

Abstract: A first image data interface section is disposed in an electrode region and an input/output buffer region provided along a first side of a semiconductor chip. A second image data interface section is disposed in an electrode region and an input/output buffer region provided along a second side. A first memory interface section is disposed in an electrode region and an input/output buffer region provided along a third side. A second memory interface section is disposed in an electrode region and an input/output buffer region provided along a fourth side.

Inventors: Higuchi; Chisato (Fuchu, JP), Amano; Yoshinobu (Hino, JP)

Assignee: Seiko Epson Corporation

International Classification: G03B 17/00 (20060101); H01L 29/41 (20060101); H01L 21/00 (20060101)

Expiration Date: 2019-11-02 0:00:00