Patent Number: 7,827,455

Title: System and method for detecting glitches on a high-speed interface

Abstract: The current invention provides a mechanism for detecting and recovering from glitches on data strobes. In one embodiment, data is captured from an interlace by a receiver using at least one data strobe that is provided by the transmitter along with the data. A write address counter that is clocked by the data strobe is used to count the active edges of the data strobe. A read address counter that is periodically synchronized with the write address counter, but that is clocked by an internal clock of the receiver, is used to count units of data being received from the interface. Periodically, the contents of the read and write counters are compared. If the contents are not the same, a glitch has occurred on the data strobe. The glitch is recoverable if it occurs on, or after, a last strobe edge of a data transfer.

Inventors: Eckel; Nathan A. (Fridley, MN), Levinshteyn; Peter (Blaine, MN), Lucas; Gary J. (Pine Springs, MN)

Assignee: Unisys Corporation

International Classification: G11C 29/00 (20060101); G01R 31/26 (20060101); G06K 5/04 (20060101); G11B 5/00 (20060101); G11B 20/20 (20060101)

Expiration Date: 2019-11-02 0:00:00