Patent Number: 8,068,176

Title: Noise elimination device for the detection of the vertical sync pulse in video signals

Abstract: In order to create a noise elimination device for the detection of the vertical sync pulse in video signals, which has a very fast locking behavior and in which additional components can be integrated easily, which components can measure fundamental parameters of the underlying composite video signal, it is proposed that the device comprises a vertical pulse detector (12), which detects successive vertical sync pulses in the composite video signal and a VPLL (vertical phase locked loop), which comprises at least a phase detector (18) that produces a phase error, at least a loop filter (20), at least an oscillator (16) on which the output signal of the vertical pulse detector is present as an input signal and which oscillator produces a clock signal phase-synchronized with the input signal, whereas the oscillator (16) is a counter which counts with an approximately constant clock frequency, while the length of an oscillation period of the oscillator (16) is determined by the change in its count due to a correction value produced by the loop filter.

Inventors: Pletz-Kirsch; Gerhard (Norderstedt, DE), Boehme; Siegfried (Hamburg, DE), Hackmann; Hartmut (Hamburg, DE)

Assignee: Trident Microsystems (Far East) Ltd.

International Classification: H04N 9/78 (20060101)

Expiration Date: 2020-11-29 0:00:00