Patent Number: 8,089,117

Title: Semiconductor structure

Abstract: A desired property for a metal gate electrode layer is that it can cover a three-dimensional semiconductor structure having a microstructure with high step coverage. Another desired property for the metal gate electrode layer is that the surface of a deposited electrode layer is flat on a nanometer scale, enables a dielectric layer for electrical insulation to be coated without performing special planization after deposition of the electrode layer. Furthermore, another desired property for the metal gate electrode layer is that it has the similar etching workability to materials used in an ordinary semiconductor manufacturing process. Furthermore, another desired property for the metal gate electrode layer is that it has a structure in which diffusion of impurity is suppressed due to homogeneity thereof and the absence of grain boundaries. It was found that an amorphous metal electrode is most suitable for realizing the metal gate electrode layer satisfying the above-mentioned properties and thereby the present invention was achieved.

Inventors: Shimizu; Takashi (Tsukuba, JP)

Assignee: National Institute of Advanced Industrial Science and Technology

International Classification: H01L 29/49 (20060101)

Expiration Date: 2020-01-03 0:00:00