Patent Number: 8,298,916

Title: Process for fabricating a multilayer structure with post-grinding trimming

Abstract: The invention relates to a process for fabricating a multilayer structure comprising: bonding a first wafer onto a second wafer, at least the first wafer having a chamfered edge; and thinning the first wafer so as to form in a transferred layer, the thinning comprising a grinding step and a chemical etching step. After the grinding step and before the chemical etching step, a trimming step of the edge of the first wafer is carried out using a grinding wheel, the working surface of which comprises grit particles having an average size of less than or equal to 800-mesh or greater than or equal to 18 microns, the trimming step being carried out to a defined depth in the first wafer so as to leave a thickness of the first wafer of less than or equal to 35 .mu.m in the trimmed region.

Inventors: Vaufredaz; Alexandre (La Murette, FR), Molinari; Sebastien (Sassenage, FR)

Assignee: Soitec

International Classification: H01L 21/46 (20060101)

Expiration Date: 2020-10-30 0:00:00