Patent Number: 8,304,290

Title: Overcoming laminate warpage and misalignment in flip-chip packages

Abstract: An apparatus, system, and method are disclosed for connecting an integrated circuit device to a substrate. A plurality of standard diameter pillars and three or more increased diameter pillars are disposed on an integrated circuit device. The increased diameter pillars have a diameter that is greater than the standard diameter pillars and a height that is similar to the standard diameter pillars. The standard diameter pillars and the increased diameter pillars form a pattern on the integrated circuit device that corresponds to contact pads on a substrate opposite the integrated circuit device. A first group of solder bumps is disposed between the standard diameter pillars and the contact pads. A second group of solder bumps is disposed between the increased diameter pillars and the contact pads. The second group of solder bumps has pre-connection heights that are greater than pre-connection heights of the first group of solder bumps.

Inventors: Graf; Richard S. (Research Triangle Park, NC), Lombardi; Thomas E. (Research Triangle Park, NC), Ray; Sudipta K. (Research Triangle Park, NC), West; David J. (Research Triangle Park, NC)

Assignee: International Business Machines Corporation

International Classification: H01L 21/00 (20060101)

Expiration Date: 2021-11-06 0:00:00