Patent Number: 8,492,227

Title: Method of forming side wall spacers for a semiconductor device

Abstract: An etching stopper film is formed over a first insulating film. Then, a second insulating film is formed with a thickness that allows concave and convex portions formed due to a first gate electrode to remain. Then, anisotropic etching is performed using the etching stopper film as a stopper to remove the second insulating film over a second gate electrode and form a first side wall spacer of the first gate electrode. Then, the etching stopper film is removed. Then, anisotropic etching is performed on the first insulating film to form a second side wall spacer over the second gate electrode and form a third side wall spacer which is disposed inside the first side wall spacer over the first gate electrode.

Inventors: Mitsuiki; Akira (Kanagawa, JP), Inada; Atsuro (Kanagawa, JP)

Assignee: Renesas Electronics Corporation

International Classification: H01L 21/8234 (20060101); H01L 21/311 (20060101)

Expiration Date: 2021-07-23 0:00:00